Re: TSC instead of ACPI: powerd doesn't work anymore (to be expected?)

From: David O'Brien (obrien_at_FreeBSD.org)
Date: 10/31/05

  • Next message: John Baldwin: "Re: CURRENT + amd64 + user-ppp = panic" 
    Date: Mon, 31 Oct 2005 08:03:05 -0800
To: Poul-Henning Kamp <phk@phk.freebsd.dk>

    On Mon, Oct 31, 2005 at 12:03:48PM +0100, Poul-Henning Kamp wrote:
    > If somebody with access to the necessary docs (ie: Intel + AMD NDAs)
    > writes a piece of code that can tell us if using the TSC is safe,
    > then we can also use the TSC in those cases.

    There are cases where the TSC will count slower while the processor is
    HTL'ed on AMD64 CPU's. This can make TSC's get out of sync on dual core
    processors. There has been an on-going thread on the x86-64 mailing list
    on the issue affecting Linux. Linux developers assumed dual-core CPU's
    had a synced TSC between cores. Ensuring the use of the ACPI (PMTIMER)
    or HPET has been recommended.

    To help the situation, AMD has publicly announced the RDTSCP (read TSCP
    pair) instruction. Also that future AMD64 processors will have a P-state
    (power state) invariant TSC. 

    --
-- David  (obrien@FreeBSD.org)
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  • Next message: John Baldwin: "Re: CURRENT + amd64 + user-ppp = panic"

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