Re: VIA padlock performance
- From: Christian Brueffer <brueffer@xxxxxxxxxxx>
- Date: Wed, 19 Jul 2006 17:52:00 +0200
On Wed, Jul 19, 2006 at 05:13:29PM +0200, Michael Reifenberger wrote:
On Tue, 18 Jul 2006, Christian Brueffer wrote:
...
Nice, could you update padlock(4) with information about supported C7
processors?
Something like the attached patch?
I'd prefer a more compact version. How about the attached patch? Also
applies some more word smithing.
- Christian
--
Christian Brueffer chris@xxxxxxxxxxxxx brueffer@xxxxxxxxxxx
GPG Key: http://people.freebsd.org/~brueffer/brueffer.key.asc
GPG Fingerprint: A5C8 2099 19FF AACA F41B B29B 6C76 178C A0ED 982D
Index: padlock.4
===================================================================
RCS file: /data/ncvs/freebsd/src/share/man/man4/man4.i386/padlock.4,v
retrieving revision 1.3
diff -u -r1.3 padlock.4
--- padlock.4 5 Jun 2006 16:24:31 -0000 1.3
+++ padlock.4 19 Jul 2006 15:46:27 -0000
@@ -24,12 +24,12 @@
.\"
.\" $FreeBSD: src/share/man/man4/man4.i386/padlock.4,v 1.3 2006/06/05 16:24:31 pjd Exp $
.\"
-.Dd June 5, 2006
+.Dd July 19, 2006
.Dt PADLOCK 4 i386
.Os
.Sh NAME
.Nm padlock
-.Nd "driver for the cryptographic functions and RNG in VIA C3 and Eden processors"
+.Nd "driver for the cryptographic functions and RNG in VIA C3, C7 and Eden processors"
.Sh SYNOPSIS
To compile this driver into the kernel,
place the following lines in your
@@ -47,14 +47,18 @@
.Ed
.Sh DESCRIPTION
The C3 and Eden processor series from VIA include hardware acceleration for
-AES, as well as a hardware random number generator.
+AES.
+The C7 series includes hardware acceleration for AES, SHA and RSA.
+All of the above processor series include a hardware random number generator.
.Pp
The
.Nm
driver registers itself to accelerate AES operations for
.Xr crypto 4 .
-It also registers itself to accelerate various HMAC algorithms, but there is no
-hardware acceleration for those algorithms, this is only needed, so
+It also registers itself to accelerate various HMAC algorithms, although
+there is no
+hardware acceleration for those algorithms.
+This is only needed, so
.Nm
can work with
.Xr fast_ipsec 4 .
@@ -74,6 +78,7 @@
.Sh SEE ALSO
.Xr crypt 3 ,
.Xr crypto 4 ,
+.Xr fast_ipsec 4 ,
.Xr intro 4 ,
.Xr random 4 ,
.Xr crypto 9
Attachment:
pgpqlli7McoNe.pgp
Description: PGP signature
- Follow-Ups:
- Re: VIA padlock performance
- From: Michael Reifenberger
- Re: VIA padlock performance
- References:
- VIA padlock performance
- From: Michael Reifenberger
- Re: VIA padlock performance
- From: Christian Brueffer
- Re: VIA padlock performance
- From: Michael Reifenberger
- VIA padlock performance
- Prev by Date: Re: VIA padlock performance
- Next by Date: Re: VIA padlock performance
- Previous by thread: Re: VIA padlock performance
- Next by thread: Re: VIA padlock performance
- Index(es):
Relevant Pages
|
Loading