Re: Architectures with strict alignment?
- From: Erich Dollansky <oceanare@xxxxxxxxxxxxxx>
- Date: Sat, 29 Dec 2007 18:03:15 +0800
Hi,
Kip Macy wrote:
Isn't it everything except x86?
not really.
All RISC based designs need the alignment so that the CPU can fetch a CPU word in one go. CISC based designs do not have this limitiation.
I also do not know of any other CISC based design which made it to mainstream.
Erich
_______________________________________________
-Kip
On Dec 29, 2007 12:11 AM, Erich Dollansky <oceanare@xxxxxxxxxxxxxx> wrote:Hi,
Ivan Voras wrote:Hi,isn't this the case with SPARC and Itanium?
Which of the architectures FreeBSD supports (if any) have strict memory
alignment requirements? (in the sense that accessing a 32-bit integer
not aligned on a 32-bit address results in a hardware trap/exception).
I know, they are 64 bits.
Erich
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- Re: Architectures with strict alignment?
... All RISC based designs need the alignment so that the CPU can fetch a
CPU ... CISC based designs do not have this limitiation. ... (freebsd-hackers) - Re: Request for feedback on common data backstore in the kernel
... Hans Petter Selasky writes: ... but mere alignment isn't it. ...
Some designs require that you do DMA only to/from a specific ... The busdma interface
is designed to hide these issues. ... (freebsd-arch) - Re: RISC vs CISC Re: Intel 8086 opcodes
... PSP11 and VAX are examples of CISC. ... OTOH the PowerPC, which is marketed
as RISC, has about 300 instructions, more ... features of both the classic RISC
*and* CISC designs, ... (comp.os.cpm)