Re: Architectures with strict alignment?

On Sat, Dec 29, 2007 at 02:06:27PM -0800, Bakul Shah wrote:
(though the AMD29K could apparently generate
dummy bus cycles to limit the number of bit transitions on any cycle
to reduce the I/O load).

Are you sure it was the amd29k? I don't recall anything like
that (and am too lazy to dig out its datasheets!).

Maybe I'm mis-remembering - it was a long time ago. Other possibility
is the M88K. I can't quickly find anything to backup my memory.

--
Peter Jeremy
Please excuse any delays as the result of my ISP's inability to implement
an MTA that is either RFC2821-compliant or matches their claimed behaviour.

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