Re: kern/127587: [bge] [request] if_bge(4) doesn't support BCM576X family



The following reply was made to PR kern/127587; it has been noted by GNATS.

From: matthieu <m.matthieu@xxxxxxxxx>
To: bug-followup@xxxxxxxxxxx
Cc:
Subject: Re: kern/127587: [bge] [request] if_bge(4) doesn't support BCM576X
family
Date: Tue, 15 Sep 2009 17:25:35 +0200

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--- if_bge.c.back 2009-07-08 20:36:45.000000000 +0200
+++ if_bge.c 2009-09-12 00:12:53.000000000 +0200
@@ -272,6 +272,7 @@
{ BGE_CHIPID_BCM5755_A1, "BCM5755 A1" },
{ BGE_CHIPID_BCM5755_A2, "BCM5755 A2" },
{ BGE_CHIPID_BCM5722_A0, "BCM5722 A0" },
+ { BGE_CHIPID_BCM5761, "BCM5761" },
/* 5754 and 5787 share the same ASIC ID */
{ BGE_CHIPID_BCM5787_A0, "BCM5754/5787 A0" },
{ BGE_CHIPID_BCM5787_A1, "BCM5754/5787 A1" },
@@ -2417,6 +2418,12 @@
sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid);
sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);

+ if (sc->bge_asicrev == BGE_ASICREV_PROD_ID_REG)
+ {
+ sc->bge_chipid = pci_read_config(dev, BGE_PCI_PRODID_ASICREV, 4);
+ }
+
+
/*
* Don't enable Ethernet@WireSpeed for the 5700, 5906, or the
* 5705 A0 and A1 chips.
@@ -2424,8 +2431,9 @@
if (sc->bge_asicrev != BGE_ASICREV_BCM5700 &&
sc->bge_asicrev != BGE_ASICREV_BCM5906 &&
sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
- sc->bge_chipid != BGE_CHIPID_BCM5705_A1)
- sc->bge_flags |= BGE_FLAG_WIRESPEED;
+ sc->bge_chipid != BGE_CHIPID_BCM5705_A1 &&
+ sc->bge_chipid != BGE_CHIPID_BCM5761)
+ sc->bge_flags |= BGE_FLAG_WIRESPEED;

if (bge_has_eaddr(sc))
sc->bge_flags |= BGE_FLAG_EADDR;
@@ -2474,6 +2482,10 @@
sc->bge_flags |= BGE_FLAG_BER_BUG;
}

+ if (sc->bge_chipid == BGE_CHIPID_BCM5761)
+ {
+ sc->bge_flags |= BGE_FLAG_5705_PLUS;
+ }

/*
* We could possibly check for BCOM_DEVICEID_BCM5788 in bge_probe()
--- if_bgereg.h.old 2009-03-23 15:36:50.000000000 +0100
+++ if_bgereg.h 2009-09-14 12:23:38.000000000 +0200
@@ -218,6 +218,7 @@
#define BGE_PCI_UNDI_TX_BD_PRODIDX_LO 0xAC
#define BGE_PCI_ISR_MBX_HI 0xB0
#define BGE_PCI_ISR_MBX_LO 0xB4
+#define BGE_PCI_PRODID_ASICREV 0xBC

/* PCI Misc. Host control register */
#define BGE_PCIMISCCTL_CLEAR_INTA 0x00000001
@@ -302,6 +303,7 @@
#define BGE_CHIPID_BCM5787_A2 0xb0020000
#define BGE_CHIPID_BCM5906_A1 0xc0010000
#define BGE_CHIPID_BCM5906_A2 0xc0020000
+#define BGE_CHIPID_BCM5761 0x05761100

/* shorthand one */
#define BGE_ASICREV(x) ((x) >> 28)
@@ -319,6 +321,9 @@
#define BGE_ASICREV_BCM5754 0x0b
#define BGE_ASICREV_BCM5787 0x0b
#define BGE_ASICREV_BCM5906 0x0c
+#define BGE_ASICREV_PROD_ID_REG 0x0f
+
+#define BGE_ASICREV_BCM5761 0x5761

/* chip revisions */
#define BGE_CHIPREV(x) ((x) >> 24)
@@ -2098,6 +2103,7 @@

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