How Alpha will save Itanium - must reading for Bill Todd!
From: Bob Ceculski (bob@instantwhip.com)
Date: 04/25/03
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From: bob@instantwhip.com (Bob Ceculski) Date: 24 Apr 2003 17:33:03 -0700
here is how Alpha will save Itanium Bill ... you
can click link and read, but I especially cut out
the paragraph for Bill how Alpha EV8-9 designs
will fit nicely with Itanium ...
http://www.theinquirer.net/?article=9127
excerpt for Bill from above article ...
While Alpha and Itanium architectures are as opposite as white and
black, there still is a lot of Alpha stuff that could find its way
into the IA-64 barn. Distributed memory controllers of EV7 and its
cancelled follow-ons are obvious candidate (with Rambus maybe changed
to DDR2) as Itanium's bus architecture is the most urgent issue to
fix.
Another possibility is one that most of The Inquirer readers, and
Intel Itanium guys too, were aware of from over a year ago: use EV8
8-way superscalar core design as a model, but instead of eight RISC
instructions, the thing could handle 4 or 8 128-bit EPIC bundles per
cycle, each with 3 instructions - possible with newer semicon
processes for wider, more parallel ALUs, register sets and datapatch
to handle the increased load. And what would be the final trick? Well,
let the compiler schedule ops within each EPIC bundle, but let the
out-of-order CPU execution schedule whole bundles out-of-order.
So, in-order execution within each bundle just like now, but
out-of-order bundle scheduling! Hah, just add the EV9-like vector
unit, and this could be a monster...
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