Re: The next port for OpenVMS? ;-)

From: Bill Todd (billtodd_at_metrocast.net)
Date: 05/19/04 

Date: Wed, 19 May 2004 03:42:44 -0400

"David Svensson" <icerq4a@spray.se> wrote in message
news:734da31c.0405182143.50852385@posting.google.com...
> Andrew Harrison SUNUK Consultancy <Andrew_No.Harrison_No@nospamn.sun.com>
wrote in message news:<c8df1c$p5u$1@new-usenet.uk.sun.com>...

...

> > To give you some idea of the problem Prescott which is currently
> > being built in a 90 nanometer process, puts out 103 watts at 3.2
> > GHz roughly 20 watts more than a 3.2 GHz Xeon built in an older
> > and apparently higher power 130 nanometer process. The 3.2 GHz
> > Prescott chip is slightly slower than Xeon for most benchmarks.
> >
> > Apparently Intel intend to use the die space that would have been
> > used to build Tejas to house 2 simpler cores that they expect
> > will deliver slightly better throughput than the single Tejas
> > core but with better thermal characteristics.
> >
> > Which leaves us with Itanium. Intels reasons for cancelling Tejas and
> > Jayhawk were mostly around their heat output, Itanium which is
> > considerably larger than Tejas and which will be even larger in
> > 2005/2006 suffers from exactly the same problem except of course
> > its worse.
>
> Montecito is apparently in silicon and running,

Prescott was 'in silicon and running' *well* over a year ago, but that
didn't keep it from being a major embarrassment right through the present
day.

 it is said to be
> released in 2005, that will most likely be second half of 2005.

Since Intel was publicly projecting a 2005H2 release date, last I heard,
it's kind of unlikely to be earlier than that.

 Going
> from 130nm to 90nm looks like a problem for P4, but not for PM.

I'd say that depends on how you define 'problem'. IIRC the new 90 nm.
Dothan Pentium M uses at least as much power as its 130 nm. Banias Pentium M
parent, in a manner distinctly reminiscent of the 130 nm. Northwood to 90
nm. Prescott non-advance. However, since unlike Northwood/Prescott Pentium
Ms aren't up against a hard power dissipation limit, they can tolerate the
fact that the move to 90 nm. bought them no increased performance efficiency
at all (though Intel is hardly likely to be happy with that).

> Whether Itanium will have the same problems as P4 in 2005 is not a
> given.

No, but if they follow the same trajectory that Prescott and Dothan did they
will. And Itanic, like the P4/Xeon, is already close to the limits of its
power envelope, which means that the 90 nm. Montecito may well clock no
faster than the current 130 nm. Madison even with one of Montecito's two
cores turned off, and may have to clock *slower* than Madison if both of its
cores are running.

 Large caches does not consume as much power as the cores,
> actually they differences can be huge, and Itanium cores are smaller
> than P4 cores.

Just about anything is smaller than a P4 core (though Itanic is pushing it:
only if/when they jettison the embedded IA32 hardware support will the
current Itanic core be *noticeably* smaller than the P4 core). But then the
question is, will they be smaller than Pentium M cores?

...

> > Sun cancelled Millenium Aka USV for exactly the same reasons that Intel
> > cancelled Tejas. This could imply that Intel is in the same boat as Sun
> > except for one very salient difference, Sun had already started
> > developing an alternative (Rock) and had been doing so for sometime,
> > Intel does not seem to have got very far if anywhere down the same
> > route.
>
> Many have predicted that Pentium M is the future, and in that regard
> they already have an advantage.

Over whom? The Pentium M core may be a significant step up from the P4
core, but it's at best comparable to the AMD64 core. And while Sun doesn't
have an existing core of its own to throw into the temporary gap left by the
cancellation of USV, they reportedly have an arrangement with Fujitsu to use
the quite respectable SPARC64.

- bill

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