Re: HP should....

From: Bill Todd (billtodd_at_metrocast.net)
Date: 02/15/05 

Date: Tue, 15 Feb 2005 03:14:45 -0500

JF Mezei wrote:
> Bill Todd wrote:
>
>>Not unless Intel stops aggressively developing Itanic, or unless someone
>>comes up with some great new secret performance feature for Alpha
>
>
> Does Montecito offer a totally different core,

No.

  or just packages two
> cores on one chip with necessary support infrastructure around the 2
> cores ?

No.

While the general design of the Montecito core dates right back to
McKinley, there have been some significant new technologies applied to
it. First, performance per Watt has been increased by something close
to a factor of 3 over Madison by selectively shutting down inactive
parts of the chip on a nanosecond-by-nanosecond basis and other tweaks
I'm less familiar with - the net effect being that a dual-core Montecito
chip should draw a bit less power than a 1.5 GHz Madison 6M (and
significantly less than a 1.6 GHz Madison 9M) while each core
significantly out-performs a Madison 9M. Second, the chip responds
dynamically to workload and adjusts the clock rate to keep the power
consumption near the maximum (unless, of course, the chip is idle) -
e.g., a nominal 2 GHz Montecito should run very compute-intensive loads
at that rate but is expected to run at about 2.2 GHz with a less
compute-intensive TPC-C workload. Third, each core supports two threads
(in a somewhat more primitive manner than fine-grained SMT, but it
should provide a noticeable boost to throughput in multi-threaded
workloads). There are other less significant tweaks as well.

In sum, Montecito should be the first Itanic that will be really
respectable: it should overtake POWER5 in smaller system configurations
even on commercial workloads (though POWER5+ will be out by then and
should maintain a lead, and I see no reason to expect Itanic's scaling
problems to go away so POWER should retain a *significant* lead in
larger systems), and will finally be competitive in terms of performance
per Watt (quite possibly better than EV8 would have been in the same
process, though well behind a 90 nm. EV8's performance core-for-core in
a commercial workload and, of course, without EV8's excellent scaling
characteristics).

>
> Does it have any built-in hardware to spread the load betwene the 2
> cores, or is that left entirely to compilers ?

It's a conventional MP with 2 threads per core. Do you know of *any*
architecture which supports some kind of hardware-automated load-spreading?

>
> Beyond Montecito, what does Intel have planned for IA64 in terms of new
> cores ? Isn't it just speed bumps, more cache for the next couple of
> years ?

Since the Alpha team's core got axed for Tukwila, my impression is that
there's no new Itanic core publicly planned: Tukwila in 2007 will have
another spin on the current core, plus EV7-style on-chip support for
memory and routing (which may partially or completely eliminate the
scaling problems which Itanic has had compared with POWER, EV7, and even
SPARC).

>
> has Intel even announced intentions to have a single coherant and shared
> cache between cores ?

Not that I know of, but that's really not very important.

>
> BTW, AMD announced fairly substantial price reductions on its 64 bit
> 8086 chips yesterday. That will put more pressure on Intel to become
> more efficient and cut unprofitable product lines, since its cash cow,
> the 8086 will have to lower its margins to compete against AMD.

The situation with Itanic right now has some similarities to that of
Alpha at the time of the Alphacide. The next generation (Montecito) is
getting ready to ship and will offer significant improvements over the
current one, and the generation after that (Tukwila) is well on the way
to completion and promises another very significant round of improvements.

So Itanic has the next several years pretty well covered without needing
all that much more development effort (and cash), just as was true for
Alpha in 2001 and why killing EV8 was such a false 'economy'. Intel has
little reason to kill a product which is - finally - becoming something
which people might actually want to buy. It may well *never* get back
the cash (let alone the opportunity cost) which it has sunk into it, but
that's irrelevant to continuing to produce and develop it now: as long
as it can generate positive cash flow (which won't happen if it's
visibly being abandoned), it will make sense to continue it, and Intel
can afford to take a wait-and-see attitude toward plowing new mountains
of cash into the kind of frenetic (one might almost say desperate)
triple-path development efforts which have characterized Itanic until now.

In other words, by all appearances Itanic will overall apparently have
been a lousy investment but the results aren't worthless - sort of like
purchasing a piece of land in the expectation that its value would
triple and eventually finding that it will never be worth as much as you
paid for it (and will in fact be even more of a loss after you consider
years' worth of taxes on it), but is still definitely worth *something*.
  And the decision to kill Alpha was beyond question incredibly stupid
for many reasons, but after all the pain at least its designated
successor looks as if it may finally become reasonably usable.

HP and Itanic may be joined at the hip. If HP goes under (or at least
ceases to be a player in the enterprise space), Intel may not have
enough of an Itanic market to break even. Intel is pretty much
dependent upon others to make or break Itanic in the marketplace - and
by this point may be sufficiently disgusted that it doesn't care all
that much which happens but will just try to be prepared for either
eventuality. Then again, it's not all that clear that HP cares too much
what happens in that space either: I certainly don't see enough
long-term investing there to be convincing.

Pretty ironic given how intensely committed both companies seemed just
months ago: finally getting over the hump, and no energy left to move on.

- bill

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