Re: fork() (Was: Re: Will "COM for OpenVMS" be ported to Itanium

From: FredK (fred.nospam_at_nospam.dec.com)
Date: 10/15/05 

Date: Sat, 15 Oct 2005 16:32:52 -0400

"Bob Koehler" <koehler@eisner.nospam.encompasserve.org> wrote in message
news:s7XCg9HT4Qkk@eisner.encompasserve.org...
> In article <jvV3f.14614$oa.7260@news.cpqcorp.net>, John Reagan
<john.reagan@hp.com> writes:
>
> > No. Memory and devices are always consistent.
>
> According to the Architecture reference, an MB is necessary before
> handing a buffer off for DMA output so that the data that the CPU
> instructions put into the buffer will actually be in RAM be when the
> DMA starts, just as it is necessary for handing off the same buffer
> to another CPU in a multi-processor system.
>

It doesn't actually have to be in RAM, it has to be at it's coherency
point -
so that any attempt to access the memory location will get it - it could be
in cache for an implementation. In fact the reason that MB was so slow
on EV4 and EV5 is that it was waiting for the memory system to ack the
update - this doesn't happen on EV6 ad EV7.

>
> And in reverse, and MB is specified after DMA input, although I don't
> know if any I/O subsystems actually required this.
>

Indirectly. Remember earlier my remark about a register read being an
implicit MB - now you know how it's done. The device/bus doesn't issue
a CPU MB instruction, but a register read to the device is an implicit MB
(as if the device *had* issued an MB). So when, for example, a device
driver reads the interrupt status register on the device - this is the
implicit
MB that is needed for the DMA.

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