OT? BIOS is NOR because (a) word addressable (b) NOR needs no ECC.



On Aug 18, 11:33 pm, Neil Rieck <n.ri...@xxxxxxxxxxxx> wrote:
Since I started out life doing hardware (that is where I received my
post secondary education), let me take off my software hat and put on
my chip-head hat for a minute.

1) SSD hardware from Fusion-io, as well as other vendors, is based
upon FLASH. However, some companies use RAM with a battery backup.

2) In some ways FLASH is just modernized EEPROM. Back in the day
(1978?) EEPROM was really a "read-mostly write-sparingly" technology
because erase+write cycles would shorten the life of the modified
locations. Back in the day, you could only write 1k times before that
cell was permanently damaged. I worked on Motorola chips in 1990 where
the manufacturer guaranteed that each location could be written to 10k
times but I'm not sure if that limit ever grew. In the 2004-5 time
frame, chip manufacturers actually stopped developing DRAM technology
in favor of FLASH which was required in all the consumer gadgets
hitting the market (including USB sticks, Digital camera chips, and
Cell phone memory, etc.) "I have heard" that FLASH locations can be
written to 100k times but suspect that commercial chips may have a
higher rating.

3) Unlike EEPROM, FLASH was designed to be erased a block at a time.
Depending upon the technology, you may be allowed to write a 1-bit
into a location currently holding a 0, but to write a 0-bit into a
location holding a 1 means you need to block-erase first and then
rewrite the whole block. So FLASH is really like a hard drive because
you also need to rewrite a whole disk sector if you want to change a
single byte. Some vendors allow for making block changes in a small
amount of RAM then flushing those changes onto the FLASH block.

4) Just like hard disks, FLASH can degrade gracefully because chip
manufacturers also do BBR/BBM (bad block replacement - bad block
management). If they move their writable regions, it is possible that
most locations would never wear out.

5) FLASH can either be NAND based or NOR based, and what you choose
determines reliability and cost. For example, BIOS chips are almost
NOR-based because that technology is more reliable.

Chip-head hat off
Software hat on

Neil Rieck
Kitchener/Waterloo/Cambridge,
Ontario, Canada.http://www3.sympatico.ca/n.rieck/

BIOS chips and the like are NOR based because NOR is word addressable
and can thus be treated like a traditional ROM (I go back to 2704
UVEPROM, thank you). With a NOR flash chip, code can in principle be
executed directly from the memory (see "execute in place"). You simply
can't do that transparently with block-at-a-time-transfer NAND flash.
NAND flash's block addressable nature also has the consequence that
some transistor-level failures are tolerable because there will be ECC
going on at some level somewhere. Failures being tolerable makes it
cheaper.
.



Relevant Pages

  • Re: OT: Steve Wozniak
    ... Since I started out life doing hardware (that is where I received my ... let me take off my software hat and put on ... In some ways FLASH is just modernized EEPROM. ... I worked on Motorola chips in 1990 where ...
    (comp.os.vms)
  • [patch 2.6.14-rc6-git 4/6] SPI m25p flash protocol driver
    ... This was originally a driver for the ST M25P80 SPI flash. ... It's beenupdated slightly to handle other M25P series chips. ...
    (Linux-Kernel)
  • Re: OT: Steve Wozniak
    ... let me take off my software hat and put on ... In some ways FLASH is just modernized EEPROM. ... I worked on Motorola chips in 1990 where ... "Toshiba announced NAND flash at the 1987 International Electron ...
    (comp.os.vms)
  • Re: IPSM & P30
    ... in managed area in order of IPSM to work. ... area extended to the end of flash. ... My flash chips are beggining with the address 0x98300000. ... of offset */ ...
    (microsoft.public.windowsce.platbuilder)
  • Re: Intel PSM (IPSM) issue
    ... at the bottom, P30B, or the top, P30T, of the flash chips. ... IPSM managed area, PSM *will not work*. ... > Bank 2, to allow for the potential of larger chips in the future ...
    (microsoft.public.windowsce.platbuilder)

Quantcast