Re: chip multithreading on ultrasparc iv
From: Fredrik Lundholm (dol_at_ce.chalmers.se)
Date: 10/22/04
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Date: 22 Oct 2004 19:42:01 GMT
In article <ec1c3924.0410221022.583112bd@posting.google.com>,
tri <tringuyen99@yahoo.com> wrote:
>Hi,
>
>The Ultrasparc IV has 2 Ultrasparc III pipeline cores capable of
>executing instructions from a separate thread on each core.
Yes.
>Does this mean in one clock cycle, instructions from 2 threads can
>execute on the Ultrasparc IV processor?
Yes, think of it as two UltraSPARC III cpu:s. Each of the UltraSPARC III
cores can execute totally independent of the other.
>Does the Ultrasparc IV also maintain architectural states for each
>thread?
Calling it multithreaded is a bit misleading when it is in fact two CPU:s
using one socket. The naming was a valiant attempt from Sun to try to
make ISV licensing "cheaper" or per socket rather than per CPU.
For all other puposes its a SMP on a chip.
/Regards
Fredrik
-- Fredrik Lundholm dol @ ce.chalmers.se
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