Re: makefile comples targets and dependencies

billy wrote:
As you see above I have 7 projects and 7 bb's. Every bb is to be a
part of every proj.

Your rules below seem to imply that projX is built (only) from a set of
files projX_bbY ?

So I will need rules/dependencies like the following

proj1 : proj1_bb1

proj1 : proj1_bb2

proj1 : proj1_bb3

proj1 : proj1_bb4

proj1 : proj1_bb5

proj1 : proj1_bb6

proj1 : proj1_bb7

proj2 : proj2_bb1

proj2 : proj2_bb2

...


The dependencies need to be created <proj>_<bb>
Another layer will be added later, but If I can get this working then
another layer will be just a cut and paste.

So instead of having 49 independent rules that all perfrom the same
functions, but with just differents names , <proj> , <bb> I could pass
the 2 names to a call statement $(call stuff, <proj>, <bb>)
If I can't get this to work I will have to create over 500 individual
rules.

If the 'projX_bbY' files already exist (aren't created by further
rules), then you can set up dependencies with simple wildcards:

proj1 : proj1_bb[1-7]
# buildcmd -o $@ $^
proj2 : proj2_bb[1-7]
# buildcmd -o $@ $^

Pattern rules may also help, in particular if projX_bbY are derived
files (not pre-existing, but created by other rules). You may want to
list specific targets somewhere, for instance in a rule for 'all':

all : proj1 proj2 proj42 # and so on
proj% : proj%_bb1 proj%_bb2 # and so on
# buildcmd -o $@ $^

(Pattern rules and wildcards don't work together.)

.

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