Why is make building all targets

Hi,

Thanks again for the help with my build options. The real problem was
how I had my Makefile structured. Anyway, I'm curious about
something. When I first started learning how to use make, I read that
make is "smart" enough to know what should be recompiled and what
shouldn't be.

I've made some programs where make actually works like that, but the
two programs I've completed recently don't. Every time I run make,
even if I only change one source file, it rebuilds all modules of the
program. The only thing I can think of is it must be how my rules are
configured, whether it be variables I'm using or how the rule is
constructed at this point I don't know. I'm hoping someone here can
enlighten me.

Here's the setup; I have header files in a directory called "inc" and
source files in "src" and during the build, the modules are built into
object files placed in a directory called "obj" to be linked into the
final binary later. Now, here's an example of my Makefile (this is
GNU make):

GCC = $(shell which g++)

OBJDIR = obj
INCDIR = inc

OPTS = -I/some/paths/here

# main.h actually doesn't exist, there is only a main.cxx file, but
since I will
# build a main.o, I include a main.h file here to easily include it in
the process
INCS = Mod1.h Mod2.h main.h
OBJS = $(INCS:.h=.o)

..PHONY: all

all : OPTS += -O2
all : llfd

llfd : ${OBJS}
${GCC} ${OPTS} -o $@ $(patsubst %,${OBJDIR}/%,$^}

Mod1.o : src/Mod1.cxx inc/Mod1.h
${GCC} ${OPTS} -c -o ${OBJDIR}/$@ $<

Mod2.o : src/Mod2.cxx inc/Mod2.h
${GCC} ${OPTS} -c -o ${OBJDIR}/$@ $<

main.o : src/main.cxx
${GCC} ${OPTS} -c -o ${OBJDIR}/$@ $^

So what about this makefile setup is it that makes it so that make
always rebuilds everything, not just the files that have been
modified.

Thanks,
Andy

.

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