Re: OSR6 Processor confusion - P4 Xeon Extreme Hyper non-sense.
- From: bv@xxxxxxx (Bill Vermillion)
- Date: Thu, 27 Apr 2006 19:45:01 GMT
In article <9LadnRkbFLgn8NLZnZ2dnUVZ_sSdnZ2d@xxxxxxxxxxx>,
Pat Welch <patubb@xxxxxxxxxxx> wrote:
XeniXman wrote:
http://www.sco.com/products/openserver6/requirements.html
On the System Requirements page for OSR6, many processors are listed
from Celeron thru Xeon thru AMD processors. In the recommended column,
is listed "Pentium P4".
(1) which P4 are they recommending? Intel lists
Intel® Pentium® 4 Processor
Intel® Pentium® 4 Processor supporting Hyper-threading Technology
Intel® Pentium® 4 Processor Extreme Edition supporting
Hyper-Threading Technology
(2) Intel also makes the Intel® Xeon® Processor, Intel® Xeon®
Processor MP, and Intel® Itanium® 2 Processor. Are these a waste of
money with OSR6? Aren't the Xeon superiour to the P4??
"Intel® Pentium® 4 Processor supporting Hyper-threading Technology" does
well with SCO, but Xeon's have more L2 cache and are more tightly
coupled for two or more processor config's.
The Extreme is optimized for high end Windows gaming systems.
Itaniums are a joke. If you want a 64 bit processor get AMD.
If you want 64 bits stay away from AMD. They have optimized for
performance and left a security hole. OK for a desktop but
not what I'd recommend in a server.
-------------
This is from a FreeBSD security announcment.
=============================================================================
FreeBSD-SA-06:14.fpu Security Advisory
The FreeBSD Project
Topic: FPU information disclosure
Category: core
Module: sys
Announced: 2006-04-19
Credits: Jan Beulich
Affects: All FreeBSD/i386 and FreeBSD/amd64 releases.
Corrected: 2006-04-19 07:00:35 UTC (RELENG_6, 6.1-STABLE)
2006-04-19 07:00:50 UTC (RELENG_6_1, 6.1-RELEASE)
2006-04-19 07:01:12 UTC (RELENG_6_0, 6.0-RELEASE-p7)
2006-04-19 07:01:30 UTC (RELENG_5, 5.5-STABLE)
2006-04-19 07:01:53 UTC (RELENG_5_4, 5.4-RELEASE-p14)
2006-04-19 07:02:23 UTC (RELENG_5_3, 5.3-RELEASE-p29)
2006-04-19 07:02:43 UTC (RELENG_4, 4.11-STABLE)
2006-04-19 07:03:01 UTC (RELENG_4_11, 4.11-RELEASE-p17)
2006-04-19 07:03:14 UTC (RELENG_4_10, 4.10-RELEASE-p23)
CVE Name: CVE-2006-1056
For general information regarding FreeBSD Security Advisories,
including descriptions of the fields above, security branches, and the
following sections, please visit
<URL:http://www.freebsd.org/security/>.
I. Background
The floating-point unit (FPU) of i386 and amd64 processors is derived from
the original 8087 floating-point co-processor. As a result, the FPU
contains the same debugging registers FOP, FIP, and FDP which store the
opcode, instruction address, and data address of the instruction most
recently executed by the FPU.
On processors implementing the "SSE" instruction set, a new pair of
instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used
for saving and restoring the FPU state. These new instructions also
save and restore the contents of the additional registers used by SSE
instructions.
II. Problem Description
On "7th generation" and "8th generation" processors manufactured by AMD,
including the AMD Athlon, Duron, Athlon MP, Athlon XP, Athlon64, Athlon64
FX, Opteron, Turion, and Sempron, the fxsave and fxrstor instructions do
not save and restore the FOP, FIP, and FDP registers unless the exception
summary bit (ES) in the x87 status word is set to 1, indicating that an
unmasked x87 exception has occurred.
This behaviour is consistent with documentation provided by AMD, but is
different from processors from other vendors, which save and restore the
FOP, FIP, and FDP registers regardless of the value of the ES bit. As a
result of this discrepancy remaining unnoticed until now, the FreeBSD
kernel does not restore the contents of the FOP, FIP, and FDP registers
between context switches.
III. Impact
On affected processors, a local attacker can monitor the execution path
of a process which uses floating-point operations. This may allow an
attacker to steal cryptographic keys or other sensitive information.
IV. Workaround
No workaround is available, but systems which do not use AMD Athlon, Duron,
Athlon MP, Athlon XP, Athlon64, Athlon64 FX, Opteron, Turion, or Sempron
processors are not vulnerable.
V. Solution
[ rest deleted - wjv]
---------------------
AMD did reply to this, but I can't seem to find where I put the
reply.
So even though they documented this it works in a different manner
than the Intel chips. BSD had a patch to the kernel the next day
or so. I don't know which Linux kernels are affected.
If I can find the link to AMD's reply on this I"ll send it along,
but it was in a e-news letter and I probably didn't get that one
saved.
Bill
--
Bill Vermillion - bv @ wjv . com
.
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