Solaris has a unified page cache; the pages are hashed into the vnode. If you modify a part of a page not in memory, the page
is created, contents of the page are then read from the disk
and then the specified portion is overwritten with the user-supplied
buffer.
Note that IO to raw devices is constrained to be on 512 byte boundaries
and in 512 byte chunks.
Re: Cached memory never gets released ... Stock linux 2.4.26 kernel.... Due to flash bug 3M of memory gets lost due to font memory getting lost ... The output of "free" cache number steadily grows. ... longer to exhaust all of system memory with the cache. ... (Linux-Kernel)
Re: Problem: Creating a raw binary string ... > While its true that a 64-bit cpu will move twice the data per instruction it ... > Memory bus width plays an important role here and unless it too is widened / ... You are forgetting the two levels of cache in the processor. ... The memory chips are addressed in Row col fashion. ... (alt.comp.lang.borland-delphi)
Re: Is Greenspun enough? ... Most OSes memory map executables directly from the file system so code doesn't pollute the file cache or swap space.... (comp.lang.lisp)
Re: Superstitious learning in Computer Architecture ... Without a LOT of logic or some other better approach, re-executing the instructions requires re-decoding and it ties up the cache memory bus transferring more data as instructions than the instructions are working on. ... The concept of cache is fundamentally flawed in that it STILL restricts access to one word per clock cycle, when a single modern ALU can easily use 5 plus whatever is eaten up with instruction accesses. ... The size of an optimizing compiler is proportional to the SQUARE of the size of the language times the SQUARE of the complexity of the machine - because all interactions must be considered. ... (comp.arch.arithmetic)
Re: FPGA-based hardware accelerator for PC ... I know that in most cases the CPU... that it contsins no cache, as BRAMs are too precious resources to be wasted ... The BRAMs are what define the opportunity, ... many threads with full associativity of memory lines using hashed MMU ... (comp.arch.fpga)
